The known Sallen-Key low-pass filter circuit comprises:                a first and a second resistor connected in series, the first resistor being connected on one end to an input of the circuit,        an amplifier of unity gain connected between the second resistor and an output of the circuit, and        a feedback path connecting the output of the amplifier to a junction between the first and the second resistor.        
Examples of such circuits are described in: Jeffrey A. Weldon, R. Sekhar Narayanaswami, Jacques C. Rudell, Li Lin, Matsanori Otsuka, Sébastien Dedieu and Paul Grey, “A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixer”, IEEE Journal of solid-state circuits, vol. 36, no 12, December 2001 (hereinafter referenced to as “D1”).
It is desirable to reduce the power consumption of the Sallen-Key low-pass filter circuit.